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PIC18FXX39
DS30485A-page 226
Preliminary
2002 Microchip Technology Inc.
BZ
Branch if Zero
Syntax:
[ label ] BZ n
Operands:
-128
≤ n ≤ 127
Operation:
if Zero bit is ‘1’
(PC) + 2 + 2n
→ PC
Status Affected:
None
Encoding:
1110
0000
nnnn
Description:
If the Zero bit is ‘1’, then the pro-
gram will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC+2+2n. This instruction is then
a two-cycle instruction.
Words:
1
Cycles:
1(2)
Q Cycle Activity:
If Jump:
Q1
Q2
Q3
Q4
Decode
Read literal
'n'
Process
Data
Write to PC
No
operation
No
operation
No
operation
No
operation
If No Jump:
Q1
Q2
Q3
Q4
Decode
Read literal
'n'
Process
Data
No
operation
Example:
HERE
BZ
Jump
Before Instruction
PC
=
address (HERE)
After Instruction
If Zero
=
1;
PC
=
address (Jump)
If Zero
=
0;
PC
=
address (HERE+2)
CALL
Subroutine Call
Syntax:
[ label ] CALL k [,s]
Operands:
0
≤ k ≤ 1048575
s
∈ [0,1]
Operation:
(PC) + 4
→ TOS,
k
→ PC<20:1>,
if s = 1
(W)
→ WS,
(STATUS)
→ STATUSS,
(BSR)
→ BSRS
Status Affected:
None
Encoding:
1st word (k<7:0>)
2nd word(k<19:8>)
1110
1111
110s
k19kkk
k7kkk
kkkk
kkkk0
kkkk8
Description:
Subroutine call of entire 2 Mbyte
memory range. First, return
address (PC+ 4) is pushed onto the
return stack. If ‘s’ = 1, the W,
STATUS and BSR registers are
also pushed into their respective
shadow registers, WS, STATUSS
and BSRS. If 's' = 0, no update
occurs (default). Then, the 20-bit
value ‘k’ is loaded into PC<20:1>.
CALL
is a two-cycle instruction.
Words:
2
Cycles:
2
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read literal
'k'<7:0>,
Push PC to
stack
Read literal
’k’<19:8>,
Write to PC
No
operation
No
operation
No
operation
No
operation
Example:
HERE
CALL
THERE,1
Before Instruction
PC
=
address (HERE)
After Instruction
PC
=
address (THERE)
TOS
=
address (HERE + 4)
WS
=
W
BSRS
=
BSR
STATUSS=
STATUS
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